There are some hardware modifications in v1.4 XS40 boards which cause IPXS does not work properly. Here we propose a short-term hardware fix that solves the problem.

V1.4 new features:

1) The default oscillator frequency is 50 MHz. Memdrvs of IPXS are designed to work up to 12MHz, for higher frequencies properly work is not warranted.

2) XS40+ Boards have 128 KByte RAMs instead of 32 KByte RAMs.

3) Bits C1 and C3 of the control register of parallel port are attached to different pins of the FPGA. These pins are used for the IPXS program to control the memory drivers.

Solution:

a) Program the oscillator frequency to 12MHz.

b) Hold the upper two bits of the memory address bus at logic 0. (only for XS+ boards)

c) Modify the ucf file (only the indicated line):

# Control pins of Parallel port

NET RST LOC=P16; # not modified

NET HST LOC=P17;

NET OP LOC=P71; # modified

d) Attach the RST pin (p16 of the FPGA) to the C1 bit of parallel port (J1-14 connector). This can be made with a wire between the J3-16 pin and the J4 jumper.

(J3 is the external connector where the FPGA pins are available, J4 is a jumper next to the chip memory, see XS40 board v1.4 schematic in the manual).